Tuesday, September 28, 2010

PIPELINING

PIPELINING
CPU sometimes referred as pipelined machines. Reason for this is in CPU, several instructions are executed at a single instance and in parallel. This definitely increases the system performance. Three pipeline stages of ARM7 are fetch, decode and execute. In the fetch stage, the instruction is fetched from memory. In the decode stage, opcode and operands of instructions are being decoded. In the final stage of execute, the decoded instruction is executed. The C55x has seven stage pipelines namely fetch, decode, address, access 1, access 2, read stage and execute. Nowadays RISC machines are designed to keep the pipeline busy and these machines have more regular timing characteristics.

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